Identification cards — Integrated circuit cards —Part 3: Cards with contacts — Electrical interface and transmission protocols
Cartes d’identification — Cartes à circuit intégré à contacts —Partie 3: Cartes à contacts — Interface électrique et protocoles de transmission

ISO (the International Organization for Standardization) and IEC (the International Electrotechnical Commission) form the specialized system for worldwide

standardization. National bodies that are members of ISO or IEC participate in the development of International Standards through technical committees
established by the respective organization to deal with particular fields of technical activity. ISO and IEC technical committees collaborate in fields of

mutual interest. Other international organizations, governmental and non-governmental, in liaison with ISO and IEC, also take part in the work. In the field

of information technology, ISO and IEC have established a joint technical committee, ISO/IEC JTC 1.
International Standards are drafted in accordance with the rules given in the ISO/IEC Directives, Part 2.
The main task of the joint technical committee is to prepare International Standards. Draft International Standards adopted by the joint technical committee

are circulated to national bodies for voting. Publication as an International Standard requires approval by at least 75 % of the national bodies casting a

vote.
ISO/IEC 7816-3 was prepared by Joint Technical Committee ISO/IEC JTC 1, Information technology, Subcommittee SC 17, Cards and personal identification.
This third edition cancels and replaces the second edition (ISO/IEC 7816-3:1997), which has been technically revised. It also incorporates the Amendment

ISO/IEC 7816-3:1997/Amd.1:2002.
In addition, it incorporates material extracted from the first edition of Part 4 (ISO/IEC 7816-4:1995), so that the transmission protocols are no longer

present in the second edition of Part 4 (ISO/IEC 7816-4:2005).
ISO/IEC 7816 consists of the following parts, under the general title Identification cards — Integrated circuit cards:
–Part 1: Cards with contacts — Physical characteristics
–Part 2: Cards with contacts — Dimensions and location of the contacts
–Part 3: Cards with contacts — Electrical interface and transmission protocols
–Part 4: Organization, security and commands for interchange
–Part 5: Registration of application providers
–Part 6: Interindustry data elements for interchange
–Part 7: Interindustry commands for Structured Card Query Language (SCQL)
–Part 8: Commands for security operations
–Part 9: Commands for card management
–Part 10: Cards with contacts — Electronic signals and answer to reset for synchronous cards
–Part 11: Personal verification through biometric methods
–Part 12: Cards with contacts — USB electrical interface and operating procedures
–Part 13: Commands for application management in multi-application environment
–Part 15: Cryptographic information application

Introduction
ISO/IEC 7816 is a series of standards specifying integrated circuit cards and the use of such cards for interchange. These cards are identification cards

intended for information exchange negotiated between the outside world and the integrated circuit in the card. As a result of an information exchange, the

card delivers information (computation result, stored data), and/or modifies its content (data storage, event memorization).
Five parts are specific to cards with galvanic contacts and three of them specify electrical interfaces.
–ISO/IEC 7816-1 specifies physical characteristics for cards with contacts.
–ISO/IEC 7816-2 specifies dimensions and location of the contacts.
–ISO/IEC 7816-3 specifies electrical interface and transmission protocols for asynchronous cards.
NOTE The first and second editions of ISO/IEC 7816-3 specified an optional use of contact C6 to provide the card with programming power required to write or

to erase internal non-volatile memory. As every card manufactured since 1990 internally generates programming power, this third edition deprecates this use,

as well as the related indications in the Answer-to-Reset and the related controls in each transmission protocol.
–ISO/IEC 7816-10 specifies electrical interface and answer to reset for synchronous cards.
–ISO/IEC 7816-12 specifies electrical interface and operating procedures for USB cards.
All the other parts are independent of the physical interface technology. They apply to cards accessed by one or more of the following methods: contacts,

close coupling and radio frequency.
–ISO/IEC 7816-4 specifies organization, security and commands for interchange.
–ISO/IEC 7816-5 specifies registration of application providers.
–ISO/IEC 7816-6 specifies interindustry data elements for interchange.
–ISO/IEC 7816-7 specifies commands for structured card query language.
–ISO/IEC 7816-8 specifies commands for security operations.
–ISO/IEC 7816-9 specifies commands for card management.
–ISO/IEC 7816-11 specifies personal verification through biometric methods.
–ISO/IEC 7816-13 specifies commands for application management in multi-application environment.
–ISO/IEC 7816-15 specifies cryptographic information application.
ISO/IEC 10536[3] specifies access by close coupling. ISO/IEC 14443[5] and ISO/IEC 15693[6] specify access by radio frequency. Such cards are also known as

contactless cards.

Identification cards — Integrated circuit cards —Part 3: Cards with contacts — Electrical interface and transmission protocols
1 Scope
This part of ISO/IEC 7816 specifies the power and signal structures, and information exchange between an integrated circuit card and an interface device such

as a terminal.
It also covers signal rates, voltage levels, current values, parity convention, operating procedure, transmission mechanisms and communication with the card.
It does not cover information and instruction content, such as identification of issuers and users, services and limits, security features, journaling and

instruction definitions.
2 Normative references
The following referenced documents are indispensable for the application of this document. For dated references, only the edition cited applies. For undated

references, the latest edition of the referenced document (including any amendments) applies.
ISO/IEC 7816-2, Identification cards — Integrated circuit cards — Part 2: Cards with contacts — Dimensions and location of the contacts
ISO/IEC 7816-4, Identification cards — Integrated circuit cards — Part 4: Organization, security and commands for interchange
3 Terms and definitions
For the purposes of this document, the following terms and definitions apply.
3.1 block
byte string comprising two or three fields defined as prologue field, information field and epilogue field
3.2 class of operating conditions
set of values for voltage and current
3.3 cold reset
first reset occurring after activation
3.4 destination node address
portion of the node address byte, identifying the intended receiver of the block
3.5 elementary time unit
nominal duration of a moment within an asynchronous character
3.6 epilogue field
final field of a block, conveying the error detection code
3.7 identification card
card identifying its holder and issuer, which may carry data required as input for the intended use of the card and for transactions based thereon
[ISO/IEC 7810[2]]
3.8 information block
block whose primary purpose is to convey application layer information
3.9 information field
field of a block, conveying data, generally application data
3.10 interface device
terminal, communication device or machine to which the card is electrically connected during operation
3.11 length byte
portion of the prologue field, encoding the number of bytes in the information field of the block
3.12 node address byte
portion of the prologue field, indicating both destination and source addresses of the block
3.13 operating card
card that can correctly carry out all its functions
3.14 procedure byte
byte transmitted by the card for indicating the progression of a T=0 command and controlling the exchange of data bytes
3.15 prologue field
first field of a block, consisting of three bytes defined as node address, protocol control and length
3.16 protocol control byte
portion of the prologue field, encoding transmission control information
3.17 receive ready block
block conveying the send-sequence number of the expected I-block, used as a positive or negative acknowledgment
3.18 redundancy code
content of the epilogue field, computed from all the bytes in the prologue field and in the information field
3.19 source node address
portion of the node address byte, identifying the transmitter of the block
3.20 supervisory block
block conveying transmission control information
3.21 transmission control
function used to control the data transmission between the interface device and the card, including block transmission with sequence control, synchronization and recovery of transmission errors
3.22 warm reset
any reset that is not a cold reset

4 Symbols and abbreviated terms
For the purposes of this document, the following symbols and abbreviated terms apply.
A, B, C classes of operating conditions
APDU application protocol data unit
BGT block guard time
BWI block waiting time integer
BWT block waiting time
CGT character guard time
CIN input capacitance
CLA class byte
CLK clock contact
COUT output capacitance
CRC cyclic redundancy code
CWI character waiting time integer
CWT character waiting time
(C(6) C(7)) value of the concatenation of bytes C(6) and C(7) (the first byte is the most significant byte)
D baud rate adjustment integer
DAD destination node address
Dd, Di, Dn default values, indicated values and negotiated values of D
etu elementary time unit
F clock rate conversion integer
f frequency value of the clock signal provided to the card by the interface device
Fd, Fi, Fn default values, indicated values and negotiated values of F
GND ground contact
GT guard time
H high state
I-block information block
ICC current at VCC
IFS maximum information field size
IFSC IFS for the card
IFSD IFS for the interface device
IIH high level input current
IIL low level input current
INF information field
INS instruction byte
IOH high level output current
IOL low level output current
I/O input/output contact
L low state
Lc field length field for coding number Nc
Le field length field for coding number Ne
LEN length byte
LRC longitudinal redundancy code
N extra guard time integer
NAD node address byte
Na exact number of available data bytes
Nc number of bytes in the command data field
Ne maximum number of bytes expected in the response data field
Nm number of remaining data bytes
Nr number of bytes in the response data field
Nx number of extra data bytes still available
OSI open systems interconnection
PCB protocol control byte
PPS protocol and parameters selection
P1 P2 parameter bytes
R-block receive ready block
RFU reserved for future use
RST reset contact
SAD source node address
S-block supervisory block
SPU standard or proprietary use contact
state H high electrical level
state L low electrical level
SW1 SW2 status bytes
T type
T=0 half duplex transmission of characters
T=1 half duplex transmission of blocks
TA, TB, … interface bytes
TCK check character
tF fall time, from 90 % to 10 % of signal amplitude
TPDU transmission protocol data unit
tR rise time, from 10 % to 90 % of signal amplitude
TS initial character
T0 format byte
T1, T2, … historical bytes
UCC voltage at VCC
UIH high level input voltage
UIL low level input voltage
UOH high level output voltage
UOL low level output voltage
NOTE In accordance with ISO 31[1], the symbols UCC, UIH, UIL, UOH and UOL replace the former symbols VCC, VIH, VIL,
VOH and VOL.
VCC supply power contact
WI waiting time integer
WT waiting time
WTX waiting time extension
X clock stop indicator
Y class indicator
‘XY’ notation using the hexadecimal digits ’0′ to ’9′ and ‘A’ to ‘F’, equal to XY to the base 16

5 Electrical characteristics
5.1 General
5.1.1 Contact assignment
The dimensions and location of the contacts shall be as specified in ISO/IEC 7816-2.
This part of ISO/IEC 7816 supports at least the following contacts.
–C1: supply power input (VCC, see 5.2.1).
–C2: reset signal input (RST, see 5.2.2).
–C3: clock signal input (CLK, see 5.2.3).
–C5: ground (GND, reference voltage).
–C6: standard or proprietary use (SPU, see 5.2.4).
–C7: input/output for serial data (I/O, see 5.2.5).
NOTE This document deprecates the use of contact C6 to provide the card with programming power because every card manufactured since 1990 internally

generates programming power.
5.1.2 Measurement conventions
By definition, when a card and an interface device are mechanically connected, each contact of the card and the corresponding contact of the interface device

together form an “electrical circuit”.
All measurements on an electrical circuit are defined with respect to GND and in an ambient temperature range 0° C to 50° C. All currents flowing into the

card are considered positive. All timings shall be measured with respect to the appropriate threshold levels.
By definition, an electrical circuit is “not active” when the voltage with respect to GND remains between 0 V and 0,4 V for currents less than 1 mA flowing

into the interface device.
5.1.3 Classes of operating conditions
This document defines three classes of operating conditions, based on the nominal supply voltage provided to the card by the interface device through VCC.
–5 V for class A.
–3 V for class B.
–1,8 V for class C.
The card shall support one or more classes. If the interface device applies a class supported by the card, then the card shall operate as specified.
–If the card supports more than one class, those classes shall be consecutive.
–If the interface device offers more than one class, the order in which those classes are applied is not within the scope of this document.
No card shall be damaged when the interface device applies a class not supported by the card (by definition, a damaged card no longer operates as specified or contains corrupt data).

5.2 Contacts
5.2.1 VCC (C1)
This contact is used to supply the card with power.
Table 1 — Electrical characteristics of VCC under normal operating conditions

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The maximum current is defined for the card. The interface device shall be able to deliver this current within the range specified for the voltage value and may deliver more. The supply power shall maintain the voltage value within the specified range despite transient power consumption as defined in Table 2.
Table 2 — Spikes on ICC

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5.2.2 RST (C2)
This contact is used to provide the card with reset signal. See 6.2.2 (cold reset) and 6.2.3 (warm reset).
Table 3 — Electrical characteristics of RST under normal operating conditions

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5.2.3 CLK (C3)
This contact is used to provide the card with clock signal. The actual value of the frequency of the clock signal is denoted f. The minimum value shall be 1 MHz. At least during activation (see 6.2.1) and cold reset (see 6.2.2), the maximum value shall be 5 MHz. For the maximum value supported by the card, see Table 7.
Unless otherwise specified, the duty cycle of the clock signal shall be between 40 % and 60 % of the cycle during stable operation. When switching the frequency from one value to another, care should be taken to ensure that no pulse is shorter than 40 % of the shortest cycle allowed by the card (see maximum frequency in Table 7). No information shall be exchanged when switching the frequency value. Two different times are recommended for switching the frequency value, either
–after completion of an answer to reset, see 8.1, while the card is waiting for a character, or
–after completion of a successful PPS exchange, see 9.3, while the card is waiting for a character.

Table 4 — Electrical characteristics of CLK under normal operating conditions

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5.2.4 SPU (C6)
This contact is available for either standard or proprietary use, as input and/or output.
Depending upon whether the card uses SPU or not, the first TB for T=15 shall be present or absent in the Answer-to-Reset: this global interface byte (see 8.3) indicates whether the use is standard or proprietary.
ISO/IEC JTC 1/SC 17 reserves the standard use for future use.
When the card is powered through VCC, if contact C6 is connected in the interface device, then the voltage shall remain between – 0,3 V and UCC + 0,3 V.
No card shall be damaged by an interface device where contact C6 is connected to VCC or GND as such an interface device complies with the previous edition (ISO/IEC 7816-3:1997).
5.2.5 I/O (C7)
This contact is used as input (reception mode) or output (transmission mode). The information exchange uses two states of the electrical circuit as follows:
–state H if the card and the interface device are in reception mode or if the transmitter imposes this state; –state L if the transmitter imposes this state.
When both the card and the interface device are in reception mode, the electrical circuit shall be at state H.
When the card and the interface device are in non-matched transmission mode, the state may be indeterminate.
During operation, the interface device and the card shall not be simultaneously in transmission mode.
The interface device shall be able to support the defined range of input currents when the input voltages are within the allowed range. The impedance presented by the interface device to the card shall allow the card to keep the output voltages within the defined range.

 Table 5 — Electrical characteristics of I/O under normal operating conditions

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6 Card operating procedure
6.1 Principles
The electrical circuits shall remain not active until the contacts of the card are mechanically connected to the contacts of the interface device. The interaction between the interface device and the card shall be conducted through the following sequence of operations.
–The interface device shall apply a class of operating conditions to the electrical circuits, i.e., activation, cold reset and possibly one or more warm resets. If the card supports the class, it shall answer to reset according to clause 8. The interface device ends up with a complete and valid Answer-to-Reset and a class of operating conditions. The interface device shall be able to repeat the entire operation.
–For exchanging information, the card and the interface device shall agree on a transmission protocol and values of transmission parameters. Clause 10 specifies T=0, the half-duplex transmission of characters with the interface device as the master. Clause 11 specifies T=1, the half-duplex transmission of blocks.
Clause 12 specifies the transmission of command-response pairs by T=0 and by T=1. When no transmission is expected from the card (e.g., after processing a command-response pair and before initiating the next one), the interface device may stop the clock signal if the card supports clock stop.
–The interface device shall perform a deactivation.
The deactivation should be completed before the mechanical disconnection between the contacts of the card and the contacts of the interface device.
6.2 Activation, resets and class selection
6.2.1 Activation
In order to initiate an interaction with a mechanically connected card, the interface device shall activate the electrical circuits according to a class of operating conditions: A, B or C, see 5.1.3, in the following order.
–RST shall be put to state L, see 5.2.2.
–VCC shall be powered, see 5.2.1.
–I/O in the interface device shall be put in reception mode, see 5.2.5. The interface device shall ignore the state on I/O during activation.
–CLK shall be provided with a clock signal, see 5.2.3.

NOTE 1 The delays between powering VCC, setting I/O in reception mode and providing the clock signal on CLK are not defined.
NOTE 2 The interface device may perform a deactivation due to short circuits.
Figure 1 summarizes activation (before time Ta) and cold reset (after time Ta).

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Figure 1 — Activation and cold reset

6.2.2 Cold reset
By the end of activation (RST in state L, VCC powered, I/O in reception mode in the interface device, CLK provided with a suitable and stable clock signal), the card is ready for a cold reset. The internal state of the card is not defined before a cold reset.
According to Figure 1, the clock signal is applied to CLK at time Ta. The card shall set I/O to state H within
200 clock cycles (delay ta) after the clock signal is applied to CLK (at time Ta + ta). The cold reset results from maintaining RST at state L for at least 400 clock cycles (delay tb) after the clock signal is applied to CLK (at time Ta + tb). The interface device shall ignore the state on I/O while RST is at state L.
At time Tb, RST is put to state H. The answer on I/O shall begin between 400 and 40 000 clock cycles (delay tc) after the rising edge of the signal on RST (at time Tb + tc). If the answer does not begin within 40 000 clock cycles with RST at state H, the interface device shall perform a deactivation.
6.2.3 Warm reset
As the answer to a warm reset may differ from the answer to the previous reset, the interface device may warm reset the card at any time, even during the answer to reset, but not before reception of the mandatory characters TS and T0 (see 8.1). The warm reset shall not be initiated less than 4 464 (= 12 × 372) clock cycles
after the leading edge of character T0.
WARNING A warm reset initiated during the answer to reset may damage a card compliant with the previous edition
(ISO/IEC 7816-3:1997).
According to Figure 2, the interface device initiates a warm reset (at time Tc) by putting RST to state L for at least 400 clock cycles (delay te) while VCC remains powered and CLK provided with a suitable and stable clock signal. The card shall set I/O to state H within 200 clock cycles (delay td) after state L is applied to RST (at time Tc + td). The interface device shall ignore the state on I/O while RST is at state L.
At time Td, RST is put to state H. The answer on I/O shall begin between 400 and 40 000 clock cycles (delay tf) after the rising edge of the signal on RST (at time Td + tf). If the answer does not begin within 40 000 clock cycles with RST at state H, the interface device shall perform a deactivation.
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Figure 2 — Warm reset

6.2.4 Class selection
Figure 3 illustrates the principles of selection of the class of operating conditions. The figure is not exhaustive.
–If the Answer-to-Reset carries a class indicator indicating the class being applied (see the first TA for T=15 in 8.2), then normal operation may continue. Alternatively, the interface device may perform a deactivation and after a delay of at least 10 ms, apply another class supported by the card.
–If the Answer-to-Reset carries no class indicator, then the interface device shall maintain the current class.
If, after completion of the answer to reset, the card does not operate, then the interface device shall perform a deactivation and after a delay of at least 10 ms, may apply another class.
–If the card does not answer to reset, then the interface device shall perform a deactivation and either
-after a delay of at least 10 ms, apply another class, if any, or
-abort the selection process.
After abortion of a selection process, the interface device may initiate another selection process.

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Figure 3 — Class selection by the interface device
Once selected, the class shall not be changed during normal operation. For changing it, the interface device shall perform a deactivation and after a delay of at least 10 ms, apply another class.

6.3 Information exchange
6.3.1 Selection of transmission parameters and protocol
After completion of the answer to reset, the card shall wait for characters from the interface device: their transmission is governed by transmission parameters (see 7.1); their interpretation is governed by a protocol (see 9, 10 and 11). Figure 4 illustrates the principles of selection of transmission parameters and protocol.
–If TA2 (see 8.3) is present in the Answer-to-Reset (card in specific mode), then the interface device shall start the specific transmission protocol using the specific values of the transmission parameters.
–Otherwise (card in negotiable mode), for the transmission parameters, the values used during the answer to reset (i.e., the default values of the transmission parameters, see 8.1) shall continue to apply as follows.
-If the value of the first character received by the card is ‘FF’, then the interface device shall have started a PPS exchange (see 9); the default values of the transmission parameters shall continue to apply until completion of a successful PPS exchange (see 9.3), after what the interface device shall start the negotiated transmission protocol using the negotiated values of the transmission parameters.
-Otherwise, the interface device shall have started the “first offered transmission protocol” (see TD1 in 8.2.3). The interface device shall do so when the card offers only one transmission protocol and only the default values of the transmission parameters. Such a card need not support PPS exchange.

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Figure 4 — Selection of transmission parameters and protocol
NOTE 1 The value of PPSS (‘FF’, see 9.2) is invalid for CLA (T=0, see 10.3.2) and for NAD (T=1, see 11.3.2.1).
NOTE 2 In a multi-protocol card offering T=0 in negotiable mode, only T=0 can be “implicitly” selected.
NOTE 3 An interface device facing a card in negotiable mode and supporting neither PPS exchange nor the “first offered transmission protocol” can perform either a warm reset or a deactivation.
NOTE 4 A card transmitting character TA2 to an interface device not aware of the existence of specific mode cannot rely on a warm reset to switch the mode.
NOTE 5 An interface device having detected character TA2 should not initiate a warm reset before it detects either an unsupported value in the received characters, or an overrun of WT (see 7.2).

6.3.2 Clock stop
For cards supporting clock stop, when the interface device expects no transmission from the card and when I/O has remained at state H for at least 1 860 clock cycles (delay tg), then according to Figure 5, the interface device may stop the clock on CLK (at time Te) while VCC remains powered and RST at state H.

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Figure 5 — Clock stop
When the clock is stopped (from time Te to time Tf), CLK shall be maintained either at state H or at state L according to the clock stop indicator X defined in 8.3.
At time Tf, the interface device restarts the clock and the information exchange on I/O may continue after at least 700 clock cycles (at time Tf + th).

6.4 Deactivation
When information exchange is completed or aborted (e.g., unresponsive card, detection of card removal), the
interface device shall deactivate the electrical circuits in the following order (see Figure 6).
–RST shall be put to state L.
–CLK shall be put to state L (unless the clock is already stopped at state L).
–I/O shall be put to state L.
–VCC shall be deactivated.

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Figure 6 — Deactivation

7 Asynchronous character
7.1 Elementary time unit
The nominal duration of one moment on the electrical circuit I/O is named “elementary time unit” and denoted etu. The etu shall be equal to F / D clock cycles on the electrical circuit CLK where F and D are the transmission parameters: F is the clock rate conversion integer and D the baud rate adjustment integer.
D f
1 etu = F × 1
The values of the transmission parameters shall be as specified in 6.3.1.
7.2 Character frame
According to Figure 7, a character consists of ten consecutive moments numbered 1 to 10. Each moment is either at state H or at state L.
–Before moment 1, the electrical circuit I/O shall be at state H.
–Moment 1 shall be at state L. It is the character start.
–Moments 2 to 9 shall encode a byte according to a coding convention (see TS in 8.1).
–Moment 10 shall encode the character parity (see TS in 8.1).
–After moment 10, both the card and the interface device shall remain in reception mode (in error-free operation) for a certain time of “pause”, so that the electrical circuit I/O remains at state H.

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Figure 7 — Character frame

Figure 8 illustrates character timings: even with a maximum shift between the receiver time origin and the transmitter time origin, the reception windows shall be all distinct from the transition windows.

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Figure 8 — Character timings

Within every character, if the state changes at the end of moment n for any n from 1 to 10, then the delay from the character leading edge to the trailing edge of moment n shall be (n±0,2) etu. When searching for a character, the receiver periodically samples the electrical circuit I/O. While the transmitter time origin is the character leading edge, the receiver time origin is the mean between the last observation of state H and the first observation of state L: the shift between time origins is at most half the sampling time. The sampling time shall be less than 0,2 etu.
The receiver shall confirm the start moment before 0,7 etu (in receiver time). The receiver shall read the second moment at (1,5±0,2) etu, the third moment at (2,5±0,2) etu, … the ninth moment at (8,5±0,2) etu and the parity moment at (9,5±0,2) etu. Character parity is checked on the fly.
The minimum delay between the leading edges of two consecutive characters is named “guard time” and denoted GT.
The maximum delay between the leading edge of a character transmitted by the card and the leading edge of the previous character (transmitted by the card or the interface device) is named “waiting time” and denoted WT. It allows detecting, e.g., an unresponsive card.
NOTE Throughout the document, the guard/waiting times are minimum/maximum delays between the leading edges of consecutive characters.

7.3 Error signal and character repetition
The use of the error signal and character repetition is protocol dependent; see 8.1, 9.1, 10.2 and 11.2.
As shown in Figure 9, when character parity is incorrect, the receiver shall transmit an error signal on the electrical circuit I/O. Then the receiver shall expect a repetition of the character.

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Figure 9 — Character transmission and repetition diagram

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Figure 10 — Error signal timings
–To signal an error, the receiver shall put I/O to state L at (10,5±0,2) etu in receiver time for one etu minimum, two etu maximum.
–To detect an error signal, the transmitter shall read I/O at (11±0,2) etu after the character leading edge.
-The correct reception is assumed if the state is H.
-The incorrect reception is assumed if the state is L. After a delay of at least two etu from the detection of the error signal, the transmitter shall repeat the character.
If either the card or the interface device provides no character repetition, it ignores and shall not suffer damage from the incoming error signal.

8 Answer to reset
8.1 Characters and coding conventions
The etu initially used by the card shall be equal to 372 clock cycles (i.e., during the answer to reset, the values of the transmission parameters are the default values Fd = 372 and Dd = 1). See TS below for an alternate measurement of this etu. The character frame shall be as specified in 7.2 with GT = 12 etu and WT = 9 600 etu.
The error signal and character repetition according to 7.3 is mandatory for the cards offering T=0; it is optional for the interface devices and for other cards.
Figure 11 shows the first character named “initial character” and denoted TS, and the beginning of the second character named “format character” and denoted T0.

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Figure 11 — Initial character TS

The initial character TS shall be as follows.
-The pattern of moments 1 to 4 shall be LHHL. The sequence (H) LHHL is a synchronization pattern.
When taking one third of the delay between the two falling edges as an alternate measurement of the etu initially used by the card, the transmission and reception mechanisms in the card shall be consistent with the timings specified in 7.2 and 7.3.
–The pattern of moments 5 to 7 shall be either LLL or HHH. It indicates a convention to encode or to decode a byte (i.e., eight bits from the most significant bit (msb) to the least significant bit (lsb) with values 0 and 1) in every subsequent character (i.e., ten consecutive moments numbered 1 to 10 at states L and H).
–The pattern of moments 8 to 10 shall be LLH.
The initial character TS has two possible patterns.
–(H) LHHL LLL LLH sets up the inverse convention: state L encodes value 1 and moment 2 conveys the most significant bit (msb first). When decoded by inverse convention, the conveyed byte is equal to ’3F’.
–(H) LHHL HHH LLH sets up the direct convention: state H encodes value 1 and moment 2 conveys the least significant bit (lsb first). When decoded by direct convention, the conveyed byte is equal to ’3B’.
Character parity is correct when there is an even number of bits set to 1 in the nine moments 2 to 10.
The card uses either coding convention. The interface device shall support both coding conventions.
The initial character TS is followed by a sequence of at most 32 characters.
–Denoted T0, the format character is mandatory.
–Denoted TA TB TC TD, the interface characters are optional. The presence of interface characters is indicated by a bitmap technique initiated by the format character T0.
–Denoted T1 T2 … TK, the historical characters are optional. The presence of historical characters depends upon a number K encoded in the format character T0.
–Denoted TCK, the check character is conditional. The presence of the check character depends upon the types T encoded in some interface characters TD.
By definition, the answer to reset is completed 12 etu after the leading edge of the last character of the sequence. By definition, the Answer-to-Reset is the value of the byte string (at most 32 bytes) encoded in that sequence of characters.

8.2 Answer-to-Reset
8.2.1 General configuration
Figure 12 shows the byte frame as used hereafter. The byte consists of eight bits numbered 8 to 1 with values 0 or 1; bit 8 is the most significant bit (msb) and bit 1 the least significant bit (lsb).

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Figure 12 — Byte frame

Table 6 illustrates the Answer-to-Reset (a string of at most 32 bytes). For notation simplicity, each one of T0 TA TB TC TD … T1 T2 … TK and TCK hereafter also denotes the byte conveyed in the respective character.
Table 6 — Answer-to-Reset

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8.2.2 Format byte T0
Figure 13 shows the format byte T0.
–Bits 8 to 5 form an indicator Y1.
–Bits 4 to 1 encode a number K from 0 to 15.

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Figure 13 — Coding of T0

8.2.3 Interface bytes TA TB TC TD
Figure 14 shows the interface byte TDi. Each interface byte TD is structural.
–Bits 8 to 5 form an indicator Yi+1.
–Bits 4 to 1 encode a type T from 0 to 15.

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Figure 14 — Coding of TDi

 Therefore T0 conveys Y1; TD1 conveys Y2; TD2 conveys Y3, and so on. In the byte conveying the indicator Yi, bits 8 to 5 state whether TAi for bit 5, TBi for bit 6, TCi for bit 7, TDi for bit 8 are present or absent (depending on whether the relevant bit is set to 1 or 0) in this order after the byte conveying Yi.
If TDi is absent, then TAi+1, TBi+1, TCi+1 and TDi+1 are also absent.
The type T refers to a transmission protocol and/or qualifies interface bytes.
–T=0 refers to the half-duplex transmission of characters specified in clause 10.
–T=1 refers to the half-duplex transmission of blocks specified in clause 11.
–T=2 and T=3 are reserved for future full-duplex operations.
–T=4 is reserved for an enhanced half-duplex transmission of characters.
–T=5 to T=13 are reserved for future use by ISO/IEC JTC 1/SC 17.
–T=14 refers to transmission protocols not standardized by ISO/IEC JTC 1/SC 17.
–T=15 does not refer to a transmission protocol, but only qualifies global interface bytes.
NOTE In TA2 (see 8.2) and PPS0 (see 9.2), bits 4 to 1 also encode a type T.
If TD1, TD2 and so on are present, the encoded types T shall be in ascending numerical order. If present, T=0 shall be first, T=15 shall be last. T=15 is invalid in TD1.
The “first offered transmission protocol” is defined as follows.
–If TD1 is present, then it encodes the first offered protocol T.
–If TD1 is absent, then the only offer is T=0.
Each interface byte TA, TB or TC is either global or specific.
–Global interface bytes refer to parameters of the integrated circuit within the card, see 8.3.
–Specific interface bytes refer to parameters of a transmission protocol offered by the card.
TA1, TB1, TC1, TA2 and TB2 are global. TC2 is specific to T=0, see 10.2.
The interpretation of TAi TBi TCi for i > 2 depends on the type T encoded in TDi–1.
–After T from 0 to 14, TAi TBi and TCi are specific to the transmission protocol T.
–After T=15, TAi TBi and TCi are global.
If more than three interface bytes TAi TBi TCi TAi+1 TBi+1 TCi+1 … are defined for the same type T, then each one is unambiguously identified by its position after the first, the second … occurrence of T in TDi–1 for i > 2.
Consequently, for each type T, the first TA TB TC, the second TA TB TC, and so on, are available.
NOTE The combination of the type T with the bitmap technique allows transmitting only useful interface bytes and when needed, to use default values for parameters corresponding to absent interface bytes.
For example, clause 11.4 specifies three interface bytes specific to T=1, namely the first TA, TB and TC for T=1. If needed, such a byte shall be transmitted respectively as TA3 TB3 and TC3 after TD2 indicating T=1.
Depending on whether the card also offers T=0 or not, TD1 shall indicate either T=0 or T=1.
8.2.4 Historical bytes T1 T2 … TK
The historical bytes describe operating characteristics of the card. Their structure and content shall be as specified in ISO/IEC 7816-4.
If K is not zero, then the Answer-to-Reset continues on K (at most 15) historical bytes T1 T2 … TK.
8.2.5 Check byte TCK
If only T=0 is indicated, possibly by default, then TCK shall be absent. If T=0 and T=15 are present and in all the other cases, TCK shall be present. When TCK is present, exclusive-oring all the bytes T0 to TCK inclusive shall give ’00′. Any other value is invalid.