Integrated Reader ICs
It is typical of RFID applications that there is a significant difference between the very large number of transponders used and the corresponding number of readers. In the early stages of RFID systems, small unit numbers as well as nonexistent standards for transmission procedures resulted in that readers still consisted of discrete components. Development costs were high as readers were correspondingly large and expensive. As a result, readers were only manufactured in small batches of a few thousand.

In the early 1990s, demand for readers soared with the introduction of electronic immobilisation systems. In addition, these applications require almost the same number of transponders and readers as each vehicle has to be equipped with a reader. Since 1995 almost all new cars have been fitted with electronic immobilisation systems as standard, which means that the number of readers reached a completely new order of magnitude. The automotive supplier market is very price sensitive; and cost reduction and miniaturisation through integrating a small number of functional modules became worth pursuing. Now it became possible to integrate the whole analogous section of a reader onto a silicon chip, with only a few external components being necessary. For the required low bit rates, microprocessors could be used to encode and decode the signal. An example of such an integrated RF interface will be presented in the following Section 11.3.1.

In the late 1990s, RFID systems were increasingly used in mass applications. Modern contactless ticketing systems, contactless payment transactions, electronic passports or the electronic product code (EPC) require millions of transponders and simultaneously a correspondingly large number of readers. And above all, today there are standards available which means that one and the same reader can be used in different applications. Ticketing and payment transaction applications as well as electronic passports exclusively use ISO/IEC 144443 as transmission standards. Applications in the goods and item logistics conform with ISO/IEC 18000-6, ISO/IEC 180000-3 or ISO/IEC 15693. Reader reusability in different applications and the demand for large numbers of readers finally resulted in the development of highly integrated single-chip reader ICs that enable a fast and cost-efficient development and production of readers. Section 11.3.2 presents an example of a single-chip reader IC and an application example.

Integrated RF Interface
We will describe Atmel’s U2270B as an example of a fully integrated RF interface in the frequency range of 125 kHz. The IC contains the following modules: on-chip oscillator, driver, received signal conditioning and an integral power supply. The on-chip oscillator generates the operating frequency in the range 100–150kHz. The precise frequency is adjusted by an external resistor at pin RF. The downstream driver generates the power required to control the antenna coil as push–pull output. If necessary, a baseband modulation signal can be fed into pin CFE as a TTL signal and this switches the RF signal on or off, generating an ASK modulation ASK 100%).

The load modulation procedure in the transponder generates a weak amplitude modulation of the reader’s antenna voltage. The modulation in the transponder occurs in the baseband, i.e. without the use of a subcarrier. The transponder modulation signal can be reclaimed simply by demodulating the antenna voltage at the reader, using a diode. The signal, which has been rectified by an external diode and smoothed using an RC low-pass filter, is fed into the ‘input’ pin of the U2270B (Figure 11.13). Using a downstream Butterworth low-pass filter, an amplifier module and a Schmitt trigger, the demodulated signal is converted into a TTL signal, which can be evaluated by the downstream microprocessor. The time constants of the Butterworth filter are designed so that a Manchester or bi-phase code can be processed up to a data rate of fosc/25 (approximately 4.8 bit/s, TEMIC, 1977).

a complete application circuit for the U2270B. A microprocessor generates the digital baseband signal that is required for modulating the transmitter in the U2270B. The processor compiles the data to be transmitted in a protocol frame and applies the corresponding software to carry out a bitwise data encoding. Entering the serial signal at Pin CFE of the U2270B generates an ASK modulation with data pulse (also see Figure 11.10).

The U2270B exports the bitstream received by the transponder as a digital baseband signal to Pin OUTPUT and the microprocessor (see Figure 11.10). The microprocessor uses software to decode the baseband signal and re-compiles individual bits into a protocol frame that also contains payload data.

Single-Chip Reader IC
RFID standards in the frequency range 13.56 MHz (for example ISO/IEC 14443, ISO/IEC 15693 or ISO/IEC 18000-3) have high bitrates (up to 848 kBit/s), anticollision algorithms and complex protocol frames for data transmission. A complete encoding and decoding of baseband signals and protocol frames in a reader’s microprocessor would result in an expensive and fault-prone software development and high demands on the microprocessor’s processing speed. In order to facilitate the reader development there is a large number of highly integrated single-chip reader ICs on the market.

Single-chip reader ICs encode and decode the signals to be sent and received and automatically generate the protocol frame. They can also calculate checksums (CRC), detect transmission errors and partially control the data stream.

NXP Semiconductors’ MFRC-522 is an example of such a single-chip reader IC) (MFRC522, 2007). Figure 11.15 shows the block diagram of an RC-522. This component supports the communication with both ISO/IEC 14443-A transponders and the MIFARE transponders.

RC-522 has an analogous circuit, a contactless UART, a FIFO buffer, a job control (status and control) as well as a host interface for connecting the component to a microprocessor. The buffered output driver of RC-522 enables the direct connection of the sending and receiving antenna without an additional active power amplifier. Only few additional passive components for antenna adaption are required. The analogous circuit completely takes over the demodulation and decoding of the data re-sent by the transponder. The contactless UART generates the protocol frames according to ISO/IEC 14443-A, or the proprietory MIFARE specification. Also the corresponding error detection (parity and CRC) in the received protocol frames occurs in the contactless UART. The FIFO buffer allows sending and receiving data blocks of a maximum of 64 bBytes in one block. Chaining can be used to segment and sequentially transmit larger data blocks.

A large number of registers that can be accessed by the connected microprocessor for read and write operations is used for programming RC-522 as well as for reading and writing data to the module. Table 11.2 presents a selection of the most important registers of the module. Using registers makes prompting RC-522 significantly easier. This way, multiple write and read operations of FIFO register FIFODataReg is used to write the data blocks to be sent to the module’s FIFO. Data received by the transponder can be easily read out of the module if the same register is read out several times. By reading out different registers it it possible, for instance, to detect CRC or parity errors occurring during data reception. Further registers are used to set desired RF interface parameters, such as bitrate and pulse width, or to generally retrieve the status of RC-522.

The register itself can be accessed through three available interfaces: the I2C or RS232 interface or via an SPI (serial peripheral interface). Programming register access is quite simple as Listing 11.1 shows for the example of the I2C interface.

Figure 11.16 shows a simple application example of a RC-522. Based on this application, Figure 11.17 shows the diagram of a fully operational reader. The block diagram of this reader in Figure 11.18 shows important functional components of this device1.

In addition to RC-522 (IC4), the circuit consists of an 8051 compatible microprocessor (IC3) and a USB/RS232 interface module (IC1). The microprocessor has a 16 kByte flash and can be easily programmed with any 8051 compiler. The USB/RS232 interface module FT232R facilitates communication with PCs.

The stand-alone operation of the circuit requires only a power-supply unit with 300 mA current for an output voltage of 5 V DC. If the circuit is operated at a USB port of a PC, no external voltage supply is necessary. The reader is operated as a bus-powered device and, as such a highpower device, it can tolerate up to 500 mA after the successful USB-bus enumeration. In order to prevent an early connection of the reader, signal PWREN of the USB interface module switches transistor T2 to conductive only after the successful enumeration. Subsequently also RC-522 and the microprocessor are supplied with operating voltage (Schalk, 2006).

The microprocessor only needs two cycles per command and is clocked with 16 MHz. This speed and the 16 kByte flash memory are sufficient for a variety of reader applications. If necessary, an LCD display can be connected to I/O port P0. Due to the vacant I/O port P2 as well as the microprocessor’s available I2C and SPI interfaces, additional hardware modules can be easily connected.

The reader’s layout and component diagram can be found in the book’s appendix (see Section 14.4.3). A complete circuit board and software for the microprocessor – and even for an installation on the PC – can be ordered via the Internet.

Selected control registers of MFRC522

Page address Register name Function

0.7 Status1Reg Contains status bits for communication

0.8 Status2Reg Contains status bits of the receiver and transmitter

0.9 FIFODataReg In-and output of the 64-byte FIFO buffer

0.A FIFOLevelReg Indicates the number of bytes stored in the FIFO

0.B WaterLevelReg Defines the level for FIFO under-and overflow warning

0.C ControlReg Contains miscellaneous control registers

0.D BitFramingReg Adjustments for bit-oriented frames

0.E CollReg Bit position of the first bit collision detected on the RF interface

1.1 ModeReg Defines general modes for transmitting and receiving

1.2 TXModeReg Defines the transmission data rate and framing

1.3 RXMode Reg Defines the receive data rate and framing

1.4 TXControlReg Controls the logical behaviour of the antenna driver pins TX1, TX2

1.5 TXASKReg Controls the setting of the TX modulation

1.6 TXSelReg Selects the internal sources for the antenna driver

1.7 RXSelReg Selects internal receiver settings

1.8 RXThresholdReg Selects thresholds for the bit decoder

  1. DemodReg Defines modulator settings
  2. CRCResultReg Shows the actual MSB and LSB values of the CRC calculation

2.4 ModWidthReg Controls the setting of the ModWidth

2.6 RFCfgReg Controls the receiver gain

2.7 GsNReg Selects the conductance of the antenna driver pins for modulaltion