SR176, 13.56MHz Short Range Contactless Memory Chip  176 bit USER EEPROM and 64 bits Unique ID

ISO 14443 – 2 Type B Air Interface Compliant
-ISO 14443 – 3 Type B Frame Format Compliant
-13.56MHz Carrier Frequency
-847kHz Sub-carrier Frequency
-106K bit/s Data Transfer
-Data Transfert
– ASK Modulation from Reader to tag
– BPSK Coding from tag to Reader
-64 bits Unique Identifier
-176 bit EEPROM with Write Protect Feature
-READ BLOCK &WRITE BLOCK (16 Bits)
-Internal Tuning Capacitor
-100K ERASE/WRITE Cycles
-10 Years Data Retention
-Self-Timed Programming Cycle
-5ms Typical Programming Time
 

The SR176 is a contactless memory powered by the received carrier electromagnetic wave. It is a 176 bits user EEPROM fabricated with STMicroelectronics CMOS technology. The memory is organised as 16 blocks of 16 bits on which 11 blocks are user accessible. The SR176 is accessed via the 13.56MHz carrier. Incoming data are demodulated and decoded from the received Amplitude Shift Keying modulation signal (ASK) and outgoing data are generated by load variation using Bit Phase Shift Keying coding (BPSK) of a 847kHz sub-carrier. The received ASK wave is 10% modulated. The Data transfer rate between the SR176 and the reader is 106Kbit/s in both reception and emission modes.  The SR176 follows the ISO 14443 part 2 type B recommendation for Radio frequency power and signal interface.

 
The SR176 is principally designed for short range applications, such as in object identification, that need a low cost and non-reusable product. The SR176 does not include any anti-collision mechanism. It provides an “addressed” selection mechanism
to cope with cases where more than one tag is present within the range of the reader.
The SR176 contactless EEPROM memory offers read and write random access in block mode. One block is composed by 16 bits. The device has an instruction set containing 7 commands:
-READ_BLOCK
-WRITE_BLOCK
-INITIATE
-SELECT
-COMPLETION
-PROTECT_BLOCK
-GET_PROTECTION.
The SR176 is divided into two major areas: the unique identifier (UID) and the User EEPROM. The UID is a 64 bits unique identifier written by ST during product manufacturing. The User EEPROM is divided into areas which can be write protected in order to behaves as ROM. The write protection is activated using an OTP lock bits register. It is possible to program the SR176 four bits chip_ID used by the SELECT command. Its default value is fixed at the value 15 (1111b) by ST. When correctly set, up to 15 SR176 can be selected individually.

MEMORY MAPPING: The SR176 is organised as 16 blocks of 16bits. The first 4 blocks, from location 0 to 3, are used to store read only data. They store the 64 bits UID. This value cannot be modified. Blocks from location 4 to 14 offer a 176 bits EEPROM user area on which the application will store its data values. Blocks 15 containt the OTP lock bits and the programmed Chip_ID. The ROTECT_BLOCK command is used to lock write access to blocks 4 to 15 by group of 2 blocks. The GET_PROTECTION command gives the status of the protection of blocks 4 to 15.

SR176, 13.56 MHz, 176-bit short range contactless user EEPROM with 64-bit Unique ID

Features
■ ISO 14443-2 Type B air interface compliant
■ ISO 14443-3 Type B frame format compliant
■ 13.56 MHz carrier frequency
■ 847.5 kHz subcarrier frequency
■ 106 Kbit/s data transfer
■ Data transfer
– ASK modulation from Reader to Tag
– BPSK coding from Tag to Reader
■ 176-bit EEPROM with Write Protect feature
■ 64-bit Unique Identifier
■ READ BLOCK and WRITE BLOCK (16 bits)
■ Internal tuning capacitor
■ Self-timed programming cycle
■ 5 ms programming time (typical)
■ More than 100 000 Erase/Write cycles
■ More than 40 year data retention
■ Packages
– ECOPACK® (RoHS compliant)

The SR176 is a contactless memory, powered by an externally transmitted radio wave. It contains 176 bits of user EEPROM, fabricated with STMicroelectronics CMOS technology. The memory is organized as 16 blocks of 16 bits, of which 11 blocks are user accessible. The SR176 is accessed via the 13.56 MHz carrier. Incoming data are demodulated and decoded from the received Amplitude Shift Keying modulation signal (ASK). The modulation index of this signal is 10%. Outgoing data are generated by load variation using Bit Phase Shift Keying (BPSK) of a 847.5 kHz subcarrier. The Data transfer rate between the SR176 and the reader is 106 Kbit/s in both reception and emission modes. The SR176 follows the ISO 14443-2 Type B recommendation for radio frequency power and signal interfacing.

The SR176 is principally designed for short range applications, such as object identification, that need a low cost and non-reusable tag. The SR176 does not include any anticollision mechanism. It provides an “addressed” selection mechanism to cope with cases where more than one tag is present within the range of the reader.

The SR176 contactless EEPROM offers read and write random access in block mode. One block is composed by 16 bits. The device has an instruction set containing seven
commands:
● READ_BLOCK
● WRITE_BLOCK
● INITIATE
● SELECT
● COMPLETION
● PROTECT_BLOCK
● GET_PROTECTION.

The memory array of the SR176 is divided into two main areas: the unique identifier (UID) and the User EEPROM. The UID is a 64-bit unique identifier, written by ST during product manufacture. The User EEPROM is divided into areas which can be write-protected so that they behave as ROM. The write protection is activated using an OTP lock bits register. It is possible to program the SR176 4-bit chip_ID used by the SELECT command. Its default value is fixed at the value 0 (0000b) by ST. When correctly set, up to sixteen SR176 devices can be selected individually.

Input data transfer from the Reader to the SR176 (request frame) The reader that accesses the SR176 must generate a 13.56 MHz sinusoidal carrier wave on its antenna, with enough energy to “tele-power” the SR176 device. The energy received on the SR176 antenna is transformed to a power supply voltage by a regulator, and to data bits through the ASK demodulator. To decode correctly the information sent to the SR176, the reader must use a 10% amplitude modulation of the 13.56 MHz wave, as represented (though not to scale) . The data transfer rate is 106 Kbit/second.

Character transmission format for request frame
Data Bytes are transmitted and received by the SR176 as 10-bit characters, with the least significant bit (b0) transmitted first. These characters, with the addition of the Start Of Frame (SOF) and the End Of Frame (EOF), are grouped to form a Command Frame. The frame includes an SOF, instructions, addresses, data, a CRC and an EOF as defined by ISO 14443-3 Type B. If an error is detected during the data transfer, no error frame is generated by the SR176, and the instruction is not executed. Each bit duration is referred to as an ETU (Elementary Time Unit). One ETU is equal to
9.44 μs (1/106 kHz).

Request start of frame
The SOF, consists of:
● one falling edge
● followed by 10 ETUs at logic 0
● followed by one single rising edge
● followed by at least 2 ETUs (but no more than 3 ETUs) at logic 1.

Request end of frame
The EOF, as shown in Figure 6, consists of:
● one falling edge
● followed by 10 ETUs set to logic 0
● followed by one single rising edge

Output data transfer from the SR176 to the Reader (answer frame)
The SR176 uses load modulation to return data to the reader. This modulation is achieved by modifying the SR176 current flow in its antenna. With appropriate detector circuitry, the reader is able to decode the information from the SR176. The data is transmitted using a BPSK coding of a 847.5 kHz subcarrier frequency, fS, as specified in ISO 14443-2 Type B, and as shown in.

Character transmission format for answer frames
The character format is the same as for the input data transfer. The transmitted frames include an SOF, data, a CRC and an EOF. Like the input data transfer, in case of error, the reader does not emit any error code to the SR176, but must be able to detect and manage this situation. The data transfer rate is 106 Kbit/second.

Answer start of frame
The SOF, consists of:
● 10 ETUs at logic 0
● 2 ETUs at logic 1

Answer end of frame
The EOF, consists of:
● 10 ETUs at logic 0
● 2 ETUs at logic 1

Transmission frame
Between the Request and the Answer data transfer, there is a guard time without ASK and BPSK modulation, for a minimum period of t0 =128/fS. This delay allows the reader to switch from transmission to reception mode, and is applied after each frame. After t0, the 13.56 MHz carrier frequency is modulated by the SR176 at 847.5 kHz for a period of t1 = 128/fS, to allow the reader to synchronize. After t1, the first phase transition generated by the SR176 represent the start bit (‘0’) of the Answer SOF. After the falling edge of the Answer EOF, the reader has to wait for the minimum delay, t2, before sending a new Request Frame to the SR176.

CRC
The 16-bit CRC that is used by the SR176 follows the ISO 14443 Type B recommendation. For further information, see Appendix A. The initial register content is all ones: FFFFh. A two-byte CRC is appended to each Request and each Answer, within each frame, before the EOF. The CRC is calculated on all the Bytes after the SOF, up to the CRC field. On reception of a Request from a reader, the SR176 verifies that the CRC value is valid. If it is invalid, it discards the frame and does not answer the reader. On reception of an Answer from the SR176, it is recommended that the reader verify that the CRC value is valid. If it is invalid, that choice of actions that are to be performed are the responsibility of the reader designer. The CRC is transmitted least significant byte first. Each byte is transmitted least significant bit first.

Memory mapping
The SR176 is organized as 16 blocks of 16 bits, as shown in.
The first four blocks, from location 0 to 3, are used to store read-only data. They store the 64-bit UID. This value cannot be modified.
Blocks from locations 4 to 14 offer a 176-bit EEPROM user area in which the application can store its data values. Block 15 contains the OTP LOCK_REG and the programmed Chip_ID. The PROTECT_BLOCK command is used to lock write access to blocks 4 to 15 in groups of two blocks.
The GET_PROTECTION command gives the status of the protection of blocks 4 to 15.

Device identification
The SR176 has a 64-bit Unique Identifier (UID) which is written by STMicroelectronics during the manufacturing process. The UID is unique for each tag and cannot be altered. It is stored in a Read Only Memory area (ROM). In the SR176, the UID is stored in the first four blocks of the memory in blocks 0 to 3.

Device selection
After introducing the device in the reader’s electromagnetic field, the SR176 has to be activated by a INITIATE command. After this command, the SR176 is in the ACTIVE state and waits for a SELECT command, as shown in Figure 13. The SELECT command specifies a 4-bit Chip_ID as a parameter. If the Chip-ID of the SR176 matches this parameter, the SR176 goes in the SELECTED state, and memory blocks become available for READ_BLOCK and WRITE_BLOCK commands up to the reception of a COMPLETION command. If the Chip_ID does not match, the SR176 returns to, or stays in, the DESELECTED state. Write access rights are activated by the SELECT command. After the Power On of the SR176, if the INITIATE  command is not send or is not correctly generated, memory blocks will not be activated, and the SR176 will not respond to any
command.

Device operations (instructions)
All instructions, data and the CRC are transmitted to the SR176 in 10-bit character format using ASK modulation. The start bit (b0 of the 10 bits) is sent first. The command frame received by the SR176 on the antenna is demodulated by the 10% ASK demodulator, and is
decoded by internal logic. Prior to any operation, the SR176 must have been previously activated by an INITIATE command (as shown in Figure 13). Each frame transmitted to the SR176 must start with a Start Of Frame, followed by one or more data characters, and is ended by two CRC bytes and the End Of Frame. When an invalid frame is decoded by the SR176 (because of a wrong instruction or CRC error), the memory does not send any error code.
When a valid frame is received, the SR176 may have to send back data to the reader. For this, it sends 10-bit characters back, with SOF, CRC and EOF, using the BPSK coding. The transfer is ended by the SR176 sending the EOF.

INITIATE()
Command Code = 06h,00h
Prior to any other command, the SR176 must be activated by an INITIATE command. All other commands sent to the SR176 before the INITIATE are ignored. In response to receiving the INITIATE command, the SR176 sends back its Chip_ID, using an 8-bit format
(Figure 17). Upon receiving a valid INITIATE command, the SR176 switches to the ACTIVE state, where it will not answer to any new INITIATE command. Once In the ACTIVE state, the SR176 will
remain in this state until it receives a valid SELECT command.

SELECT(Chip_ID)
Command Code = 0Eh,(X.ID)h
Prior to any memory access, the SR176 must have been set in the SELECTED state by a SELECT() command. All other commands sent to the SR176 before the SELECT(), except INITIATE(), are ignored. In response to receiving the SELECT() command, the SR176 sends back its Chip_ID, using an 8-bit format (Figure 21).
Any SR176 that is already in the SELECTED state, and which receives a SELECT() command that does not match its Chip_ID, is automatically put in the DESELECTED state.
The SR176 stays in the SELECTED state up to the reception of a COMPLETION or a SELECT with a non-matching Chip_ID.
After a PROTECT_BLOCK command, it is necessary to send a new SELECT command in order to load enable the write access again in the internal logic. If a SELECT is not send, the SR176 keeps the previous write access rights.

COMPLETION
Command Code = 0Fh
When the COMPLETION command is received, the SR176 is put in the DEACTIVED state, and does not decode any new commands up to a Power-Off, and a new Power-On has occurred. This allows a new SR176 to be activated by an INITIATE command, without needing to remove the previous ones. The SR176 does not generate any response when it executes a COMPLETION command (Figure 23).
Prior to any COMPLETION command, the SR176 must have been put in the SELECTED mode by a SELECT command. A SR176 which was not selected does not interpret this command.
Request parameters

READ_BLOCK
Command Code = 08h,(X.AD)
When receiving the READ_BLOCK command, the SR176 reads the requested block and sends back its 16-bit value in response. The AD value of the four least significant bits of the address code, (X.AD) (b3 to b0) represents the block address to be read. For
example, address 06h sends back the value of block 6.
Prior to any READ_BLOCK command, the SR176 must have been set into the SELECTED state.
Request parameters:
● ADDRESS: to specify an address block from 00h to 0Eh
Response parameters:
● DATAL: least significant Byte
● DATAH: most significant Byte

Read the 64-bit UID
To read the complete 64-bit UID value from the SR176, the reader must provide a sequence of four READ_BLOCK commands, in the following order:
● READ_BLOCK @ 0 to get UID0
● READ_BLOCK @ 1 to get UID1
● READ_BLOCK @ 2 to get UID2
● READ_BLOCK @ 3 to get UID3

Unique Identifier (UID)
Members of the SR176 family are uniquely identified by a 64-bit Unique Identifier (UID). This is used for addressing each SR176 device uniquely after the anticollision loop. The UID complies with ISO/IEC 15963 and ISO/IEC 7816-6. It is a read-only code, and comprises:
● an 8-bit prefix, with the most significant bits set to D0h
● an 8-bit IC Manufacturer code (ISO/IEC 7816-6/AM1) set to 02h (for STMicroelectronics)
● a 6-bit IC code set to 00 0010b = 2d for SR176
● a 42-bit Unique Serial Number

WRITE_BLOCK
Command Code = 09h,(X.AD)
Prior to any WRITE_BLOCK command, the SR176 must have been set into the SELECTED state.
When executing the WRITE_BLOCK command, the SR176 overwrites the contents of the addressed block with the 16-bit value that was sent in the command, provided that the block is available and not write protected. The AD value of the four least significant bits of the
address code (X.AD) (b3 to b0) represents the block address. For example, address 06h specifies that the data should be written in block 6. The SR176 does not generate any response when it executes a WRITE_BLOCK command (Figure 30). The reader must check after the programming time, tW, that the data bits were correctly programmed.
Block addresses between 0 to 3 cannot be accessed using the WRITE_BLOCK command (the command has no effect on these blocks). Write access to block 15 is described in the section on the PROTECT_BLOCK command.
Request parameters:
● ADDRESS: address block from 4 to 14
● DATAL: least significant Byte
● DATAH: most significant Byte

PROTECT_BLOCK
Command Code = 09h,0Fh,00h,LOCK_REG
Prior to any PROTECT_BLOCK command, the SR176 must have been set into the SELECTED state.
The PROTECT_BLOCK command allows the write access to be blocked to memory blocks 4 to 15. It must be followed by a SELECT() command. This re-initializes the write protection conditions to blocks 4 to 15. Until then, the new protection setting is not taken into account by the SR176 logic. The SR176 does not generate any response when it executes a PROTECT_BLOCK command. The reader must use the GET_PROTECTION command to get the information on the protection status.
The OTP LOCK_REG controls the write-protection on blocks 4 to 15, and is, itself, One-Time Programmable. Each ‘1’ in the LOCK_REG parameter indicates that the corresponding bit in the OTP LOCK_REG should be set. Each ‘0’ indicates that the corresponding bit should be left unchanged. Once a bit in the OTP LOCK_REG has been set to ‘1’, it is not possible to reset it to ‘0’ and the corresponding memory blocks are forever write protected (and behaves like ROM).
Request parameters:
● LOCK_REG

GET_PROTECTION
Command Code = 08h,0Fh
Prior to any GET_PROTECTION, the SR176 must have been set into the SELECTED state.
GET_PROTECTION allows the protection status of memory blocks 4 to 15 to be read.
When receiving the GET_PROTECTION command, the SR176 responds with the 16-bit value of block 15 (Figure 35). It gives the status of the LOCK_REG and the Chip_ID of the SR176.
Request parameters:
● none
Response parameters (Figure 34):
● Chip_ID: least significant Byte
● LOCK_REG: most significant Byte

Power-on state
After Power-on, the SR176 is in the following state:
● The device is in the low power mode.
● The device is deselected.
● The device presents its highest impedance to the reader antenna field.
● It will not answer to any command except INITIATE.

Maximum rating
Stressing the device above the rating listed in the Absolute Maximum Ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.

DC and ac parameters
This section summarizes the operating and measurement conditions, and the dc and ac characteristics of the device. The parameters in the dc and ac characteristic tables that follow are derived from tests performed under the Measurement Conditions summarized in the relevant tables. Designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parameters.

Package mechanical
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second-level interconnect. The category of Second-Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97.
The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark.

Part numbering
Package

W4 = 180 μm ± 15 μm Unsawn Wafer
SBN18 = 180 μm ± 15 μm Bumped and Sawn Wafer on 8-inch Frame
A3T = 38 mm x 38 mm Copper Antenna on Continuous Tape
A3S = 38 mm x 38 mm Copper Singulated Adhesive Antenna on Tape
A4T = 15 mm x 15 mm Copper Antenna on Continuous Tape
A4S = 15 mm x 15 mm Copper Singulated Adhesive Antenna on Tape
A5T = 42 mm x 65 mm Copper Antenna on Continuous Tape
A5S = 42 mm x 65 mm Copper Singulated Adhesive Antenna on Tape

XXX = Given by STMicroelectronics

Appendix A ISO 14443 Type B CRC calculation
#include
#include
#include
#include
#define BYTE unsigned char
#define USHORTunsigned short
unsigned short UpdateCrc(BYTE ch, USHORT *lpwCrc)
{
ch = (ch^(BYTE)((*lpwCrc) & 0x00FF));
ch = (ch^(ch<<4));
*lpwCrc = (*lpwCrc >> 8)^((USHORT)ch << 8)^((USHORT)ch<<3)^((USHORT)ch>>4);
return(*lpwCrc);
}
void ComputeCrc(char *Data, int Length, BYTE *TransmitFirst, BYTE *TransmitSecond)
{
BYTE chBlock; USHORTt wCrc;
wCrc = 0xFFFF; // ISO 3309
do
{
chBlock = *Data++;
UpdateCrc(chBlock, &wCrc);
} while (–Length);
wCrc = ~wCrc; // ISO 3309
*TransmitFirst = (BYTE) (wCrc & 0xFF);
*TransmitSecond = (BYTE) ((wCrc >> 8) & 0xFF);
return;
}
int main(void)
{
BYTE BuffCRC_B[10] = {0x0A, 0×12, 0×34, 0×56}, First, Second, i;
printf(“Crc-16 G(x) = x^16 + x^12 + x^5 + 1”);
printf(“CRC_B of [ ");
for(i=0; i<4; i++)
printf("%02X ",BuffCRC_B[i]);
ComputeCrc(BuffCRC_B, 4, &First, &Second);
printf(“] Transmitted: %02X then %02X.”, First, Second);