Highly Integrated ISO14443A Reader IC, MF RC500

TEST SIGNALS
The MF RC500 allows different kind of signal measurements. These measurements can be used to check the internally generated and received signals using the possibilities of the serial signal switch . Furthermore, with the MF RC500 the user may select internal analogue signals to measure them at pin AUX and internal digital signals to observe them on pin MFOUT by register selections. These measurements can be helpful during the design-in phase to optimise the receiver’s behaviour or for test purpose.

Measurements Using the Serial Signal Switch
Using the serial signal switch at pin MFOUT the user may observe data send to the card or data received from the card. The following tables give an overview of the different signals available.

SignalToMFOUT MFOUTSelect Signal routed to MFOUT pin
0 0 LOW
0 1 HIGH
0 2 Envelope
0 3 Transmit NRZ
0 4 Manchester with Subcarrier
0 5 Manchester
0 6 RFU
0 7 RFU
1 X Digital Test signal

Table 19-1 Signal routed to MFOUT pin

TX-CONTROL
The following plot shows the signal measured at MFOUT using the serial signal switch to control the data sent to the card .Setting the flag MFOUTSelect to 3 data sent to the card is shown NRZ coded.
MFOUTSelect set to 2 shows the Miller coded signal. The RFOut signal is measured directly on the antenna showing the pulse shape of the RF signal. For detail information concerning the pulse of the RF signal please refer to the application note ‘MIFARE Design of MF RC 500 Matching Circuits and Antennas’

RX-CONTROL
The following plot shows the beginning of a cards answer to a request signal. The signal RF shows the RF voltage measured directly on the antenna so that the cards load modulation is visible. MFOUTSelect set to 4 shows the Manchester decoded signal with subcarrier. MFOUTSelect set to 5 shows the Manchester decoded signal.

Analog Test-Signals
The analog test signals may be routed to pin AUX by selecting them with the register bits TestAnaOutSel.

Value Signal Name Description
0 Vmid Voltage at internal node Vmid
1 Vbandgap Internal reference voltage generated by the band gap.
2 VRxFollI Output signal from the demodulator using the I-clock.
3 VRxFollQ Output signal from the demodulator using the Q-clock.
4 VRxAmpI I-channel subcarrier signal amplified and filtered.
5 VRxAmpQ Q-channel subcarrier signal amplified and filtered.
6 VCorrNI Output signal of N-channel correlator fed by the I-channel subcarrier signal.
7 VCorrNQ Output signal of N-channel correlator fed by the Q-channel subcarrier signal.
8 VCorrDI Output signal of D-channel correlator fed by the I-channel subcarrier signal.
9 VCorrDQ Output signal of D-channel correlator fed by the Q-channel subcarrier signal.
A VEvalL Evaluation signal from the left half bit.
B VEvalR Evaluation signal from the right half bit.
C VTemp Temperature voltage derived from band gap.
D rfu Reserved for future use
E rfu Reserved for future use
F rfu Reserved for future use

Table 19-2: Analog Test Signal Selection

Digital Test-Signals
Digital test signals may be routed to pin MFOUT by setting bit SignalToMFOUT to 1. A digital test signal may be selected via the register bits TestDigiSignalSel in Register TestDigiSelect.
The signals selected by a certain TestDigiSignalSel setting is shown in the table below:

TestDigiSignalSel  Signal Name Description
F4hex s_data Data received from the card.
E4hex s_valid Shows with 1, that the signals s_data and s_coll are valid.
D4hex s_coll Shows with 1, that a collision has been detected in the current bit.
C4hex s_clock Internal serial clock: during transmission, this is the coder-clock and during reception this is the receiver clock.
B5hex rd_sync Internal synchronised read signal (derived from the parallel µ-Processor interface).
A5hex wr_sync Internal synchronised write signal (derived from the parallel µ-Processor interface).
96hex int_clock Internal 13.56 MHz  clock.
00hex no test signal output as defined by MFOUTSelect are routed to pin MFOUT.

Table 19-3: Digital Test Signal Selection
If no test signals are used, the value for the TestDigiSelect-Register shall be 00hex.
Note: All other values of TestDigiSignalSel are for production test purposes only.

Examples of Analog- and Digital Test Signals
Fig. 22 shows a MIFARE® Classic Card’s answer to a request command using the Qclock receiving path. RX –Reference is given to show the Manchester modulated signal at the RX pin. This signal is demodulated and amplified in the receiver circuitry VRXAmpQ shows the amplified side band signal having used the QClock for demodulation. The signals VCorrDQ and VCorrNQ generated in the correlation circuitry are evaluated and digitised in the evaluation and digitizer circuitry. VEvalR and VEvalL show the evaluation signal of the right and left half bit. Finally, the digital test-signal S_data shows the received data which is sent to the internal digital circuit and S_valid indicates that the received data stream is valid.